Introduction
The Apollo Pro 266 chipset is VIA’s latest offering for the Intel Pentium III processor. As the successor to the Apollo Pro 133A, the 266 is a significant release on several fronts, the reasons for which we will take a look at in a moment. The 266 is comprised of the VT8633 V-Link Host North Bridge and the VT8233 V-Link Client South Bridge (V-Link is one of the significant improvements). The South Bridge is quite similar to the 686B except the 8233 contains the PCI bus interface, it can support up to 6 USB ports, and it has an integrated 10/100 Ethernet controller.
The most obvious modification to the Apollo Pro 266 is the support for DDR RAM (PC1600 / PC2100) and its 2.1GB/s of available memory bandwidth (at 133MHz). This is an important step forward for general market acceptance of DDR SDRAM as it will ease the progression away from PC100 / PC133 RAM. The reason this is important is because DDR’s chief opponent, RDRAM (RAMBUS), is being pushed quite heavily by Intel for their new baby the P4. While RDRAM provides a powerful memory solution, it also packs a large monetary punch (although the price has been coming down as of late). As many have noted, however, Crucial has been selling their DDR RAM at a similar price to their PC133 which makes it a very tempting solution.
A less obvious addition to the Apollo Pro 266 is the introduction of V-Link: VIA’s answer to Intel’s two year old IHA (“Intel Hub Architecture”). Up until the Pro 266, VIA chipsets relied on the 33MHz PCI to connect the North Bridge and South Bridge. The obviously problem with this is that of limited bandwidth. At 33MHz, the 32-bit PCI bus can muster about 133MB/s of bandwidth that needs to be shared with not only all of the PCI cards but the data traffic between the North and South Bridges as well. This was fine back in the day, but with today’s technology this setup has become a little outrageous.
In 1999, Intel introduced their Hub Architecture with the i810 chipset which creates a dedicated data channel for the traffic between the North and South bridges. This, of course, was only available on Intel chipsets until VIA came along with the Apollo Pro 266 and V-Link, which perform essentially the same task as Intel’s solution (which is present in all 8xx-based chipsets by the way). This will give VIA-based mobos the same growing room as that of Intel-based boards. This is the reason why control over the PCI bus has moved down to the South Bridge, since there is no longer a need to use it to connect the two bridges together.
Without further ado, let’s take a look at the Soyo SY-7VDA and its implementation of the Pro 266.
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