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Primary Goals

• Low Power
• High Performance
• Scalable

Low Power

Intel is building the Core family of products on its 65nm process, which allows for lower power consumption and higher execution speed, thus helping to meet their primary goals.

Going to 65nm by itself is not enough to keep the power consumption low. Instead of the old approach in P4 days - working harder - i.e. cranking up the MHz - Intel went back to the drawing board and started working smarter - at lower clock rates.

High Performance

No matter how fast our computers get, we can never seem to get enough performance.

We always want to do more... more calculations... more details in games... more effects!

Since having long pipelines and just cranking up the Mega-Hurts (pun intended) did not work out too well for the Intel P4, Intel decided to take a look at how the Pentium-M (based on the Pentium 3) mobile architecture could be tweaked for higher performance.

Wide Dynamic Execution is how marketing describes having two cores capable of executing up to four instructions per clock cycle. The Conroe architecture improves on previous Intel cores by moving to a four instruction wide execution unit - a 33% increase from the previous three instruction wide execution units, and the shorter 14 stage pipeline significantly reduces the penalty of mispredicted branches.